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I see that there is a GAP8 chip with RISC-V multi-core architecture on the AI-deck https://github.com/bitcraze/AIdeck_exam ... started.md.
And it says that The GAP8 SDK has recently added support for OpenOCD and debuggers with a ftdi interface should be usable. We have tested the Olimex ARM-USB-TINY-H with success and also the JLINK.

So, why could we use the debugger for ARM architecture to debug a chip with RISC-V architecture?

Because we have implemented openOCD (http://openocd.org/), which is a standard debug interface between target and your host.
Once it's implemented, the openOCD will be in charge of your PC command -> JTAG control -> target debugging/programming, no matter it's ARM target or MIPs or x86 or RISC-V.
However, there are some debugger, like STLink, support ONLY their ARM target. In this case, I believe it's still possible to use for a RISC-V core, but you need to do some hack on HW.

Hope this answers your question.

Get it!
Thanks~