need some help about lighthouse

Topics related to the Lighthouse positioning system, configuration and use
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arix
Member
Posts: 47
Joined: Fri Sep 01, 2017 1:45 am

need some help about lighthouse

Post by arix »

I am a new for lighthouse,some questions can you help me ?

1.the clock about fpaga 24Mhz or 48Mhz,I want to find it from sch, but can't get about it, so i find it from code , the Lighthouse.scala
show 48Mhz, but the lighthouse.c show 24Mhz. what the clock is correct? I want to make a pcb. thanks
2. the ice40 load the bootloader from usb FTDI? can you give me some help about it? use toolbelt and docker-fpga-builder ?
3.the lighthouse can support v1 now ? v2 base station is so expensive ...
Thank you very much !~!

kristoffer
Bitcraze
Posts: 282
Joined: Tue Jun 30, 2015 7:47 am

Re: need some help about lighthouse

Post by kristoffer »

1.the clock about fpaga 24Mhz or 48Mhz,I want to find it from sch, but can't get about it, so i find it from code , the Lighthouse.scala
show 48Mhz, but the lighthouse.c show 24Mhz. what the clock is correct? I want to make a pcb. thanks
The timestamp clock runs at 24 MHz while offsets are expressed in a 6 MHz clock
2. the ice40 load the bootloader from usb FTDI? can you give me some help about it? use toolbelt and docker-fpga-builder ?
The easiest way to build the binary is by using the toolbelt (https://github.com/bitcraze/toolbelt). When it is installed all you have to do is

Code: Select all

tb build
Another option is to run the builder separately

Code: Select all

docker run --rm -it -v $PWD:/module bitcraze/fpga-builder:2 tools/build/build
On our breakout deck we use USB to communicate/flash. You can find more information in this post viewtopic.php?f=18&t=4223&p=19232&hilit ... usb#p19232

To write the binary to the FPGA via USB you should use something like

Code: Select all

tools/reboot.py /dev/tty.SLAB_USBtoUART && ../lighthouse-bootloader/scripts/uart_bootloader.py /dev/tty.SLAB_USBtoUART /path/to/the/binary/lighthouse.bin
where /dev/tty.SLAB_USBtoUART is the USB uart (assuming you are using linux or OSX)
3.the lighthouse can support v1 now ? v2 base station is so expensive ...
Yes both V1 and V2 are supported by the latest FPGA. If you are only interested in using LH V1 the previous FPGA binary should work as well, but it has a different UART protocol.

arix
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Posts: 47
Joined: Fri Sep 01, 2017 1:45 am

Re: need some help about lighthouse

Post by arix »

Thanks for reply so quickly!

1.do you means the U13 DSC600X is 24Mhz clock?
2.how to install toolbelt, run ./run_in_dev.sh?

kristoffer
Bitcraze
Posts: 282
Joined: Tue Jun 30, 2015 7:47 am

Re: need some help about lighthouse

Post by kristoffer »

I'm not completely sure about the implementation details (I just use the output from the deck :-) but I think the internal clock in the FPGA is running at 24 MHz

You will find installation instructions in the readme in the github repo https://github.com/bitcraze/toolbelt

arix
Member
Posts: 47
Joined: Fri Sep 01, 2017 1:45 am

Re: need some help about lighthouse

Post by arix »

ok, now i know how to use docker. thanks
by the way the basestation 2.0 need one or two or more for lighthouse system?

kristoffer
Bitcraze
Posts: 282
Joined: Tue Jun 30, 2015 7:47 am

Re: need some help about lighthouse

Post by kristoffer »

Lighthouse 2 should work with either one or two base stations. The FPGA supports more than 2 base stations, but the Crazyflie firmware and client don't.

arix
Member
Posts: 47
Joined: Fri Sep 01, 2017 1:45 am

Re: need some help about lighthouse

Post by arix »

mmm from the web i find the basestation v1 need 2 to support fly, you means basestation only need 1 to support fly? the config is same? and 1 basestation support how many planes?
when i make lighthouse-fpga, 1 error appear
could you help me?

ERROR: Max frequency for clock 'Core_clk': 47.89 MHz (FAIL at 48.00 MHz)
Info: Max frequency for clock 'Slow_clk_$glb_clk': 24.14 MHz (PASS at 24.00 MHz)

Info: Max delay <async> -> posedge Slow_clk_$glb_clk: 4.19 ns
Info: Max delay posedge Core_clk -> posedge Slow_clk_$glb_clk: 6.22 ns
Info: Max delay posedge Slow_clk_$glb_clk -> <async> : 16.79 ns
Info: Max delay posedge Slow_clk_$glb_clk -> posedge Core_clk : 12.81 ns

Info: Slack histogram:
Info: legend: * represents 61 endpoint(s)
Info: + represents [1,61) endpoint(s)
Info: [ -48, 3773) |*********+
Info: [ 3773, 7594) |**+
Info: [ 7594, 11415) |******+
Info: [ 11415, 15236) |**********+
Info: [ 15236, 19057) |**********+
Info: [ 19057, 22878) |**+
Info: [ 22878, 26699) |*+
Info: [ 26699, 30520) |**************+
Info: [ 30520, 34341) |*******************+
Info: [ 34341, 38162) |************************************************************
Info: [ 38162, 41983) |+
Info: [ 41983, 45804) |
Info: [ 45804, 49625) |
Info: [ 49625, 53446) |
Info: [ 53446, 57267) |
Info: [ 57267, 61088) |
Info: [ 61088, 64909) |
Info: [ 64909, 68730) |+
Info: [ 68730, 72551) |+
Info: [ 72551, 76372) |+
11 warnings, 1 error
Makefile:20: recipe for target 'lighthouse.asc' failed
make: *** [lighthouse.asc] Error 1

i can make lighthouse-bootloader.

when i have make lighthouse-bootloader, it appear some files:
bootloader.asc,
bootloader.bin,
bootloader.bin.0,
bootloader.bin.1,
bootloader_multi.bin
bootloader.rpt

and what's i need to load to fpga?
Thank you!

kristoffer
Bitcraze
Posts: 282
Joined: Tue Jun 30, 2015 7:47 am

Re: need some help about lighthouse

Post by kristoffer »

mmm from the web i find the basestation v1 need 2 to support fly, you means basestation only need 1 to support fly? the config is same? and 1 basestation support how many planes?
Yes, the Crazyflie firmware works with one base station only, but positioning is more reliable with two base stations since more data is provided.
You use the same configuration as for two base stations.
The position is calculated in the Crazyflie, so from a positioning point of view, there is no limitation to the number of concurrent Crazyflies.

All documentation may not be up to data, where did you read that two base stations are required? I would like to update it.
ERROR: Max frequency for clock 'Core_clk': 47.89 MHz (FAIL at 48.00 MHz)
Info: Max frequency for clock 'Slow_clk_$glb_clk': 24.14 MHz (PASS at 24.00 MHz)
After the FPGA has been built, the resulting design is tested to make sure it can handle the required clock frequencies. The error you get means that it did not meet the requirements and would only be able to do 47.89 MHz, which is not enough. At this point you have two options:
1. redesign your changes
2. change the seed. The build process is randomized but based on a seed, and by changing the seed you will get a different routing with different properties. The current design uses almost all resources in the FPGA and the process when making changes is pretty much to change the seed, rebuild and see if it worked. If not, try another seed and so on. You will find the seed here https://github.com/bitcraze/lighthouse- ... kefile#L20

Also to clarify on your initial question if the FPGA runs on 24 or 48 MHz. I'm not sure of all the details, but my view of how it works is that there is one part that runs on 48 MHz that do initial processing of each sensor in parallel. That data is then merged when pushed into one queue for further processing, and this processing is done at 24 MHz.

arix
Member
Posts: 47
Joined: Fri Sep 01, 2017 1:45 am

Re: need some help about lighthouse

Post by arix »

mmm it I was wrong for 2 basestation, in wiki is one or two.

https://www.bitcraze.io/documentation/r ... _overview/
in this doc, that means i only need basetationv1 and not required anymore ? in wiki show me i also need a vive tracker to config system.
And it confused me .

https://www.bitcraze.io/2019/02/lightho ... -software/
in this blog show the clock is 12MHZ, 48 24 12 I am so confused.

help me thankyou very much !

kristoffer
Bitcraze
Posts: 282
Joined: Tue Jun 30, 2015 7:47 am

Re: need some help about lighthouse

Post by kristoffer »

Thanks for the links!
The documentation is continuously being updated, it is a bit of a moving target :-) We are also phasing out the wiki (hence the deprecation notes) and the documentation in https://www.bitcraze.io/documentation/repository/ is more up to date.

The external clock that is fed to the FPGA runs at 12 MHz. In the FPGA two other clocks; the fast (48MHz) and slow (24MHz) clocks are generated from the external clock.
You can find the code at https://github.com/bitcraze/lighthouse- ... la#L38-L70

The fast clock is scaled up from 12 to 48 MHz using a PLL, and the slow clock is derived from the fast clock.

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